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Method for ranking paths for power optimization of an integrated circuit design and corresponding computer program product
Method for ranking paths for power optimization of an integrated circuit design and corresponding computer program product
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机译:用于对集成电路设计的功率优化的路径进行排名的方法以及相应的计算机程序产品
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摘要
The invention pertains to a method for ranking paths for power optimization of an integrated circuit design, comprising identifying a plurality of paths of the integrated circuit design, each path comprising one or more instances of electronic devices providing an instance power estimate for each instance in the identified paths providing, for each identified path, at least one weighted power estimate based on the instance power estimates for instances in the path, and providing a ranking of the paths based on the least one weighted power estimate. The invention also pertains to a corresponding computer program product.
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