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Porting a circuit design from a first semiconductor process to a second semiconductor process

机译:将电路设计从第一半导体工艺移植到第二半导体工艺

摘要

Porting a first integrated circuit design targeted for implementation in a first semiconductor manufacturing process, and implementing a second circuit design in a second semiconductor manufacturing process wherein the electrical performance of the second integrated circuit meets or exceeds the requirements of the first integrated circuit design even if the threshold voltage targets of the second integrated circuit design are different from those of the first integrated circuit design; and wherein physical layouts, and in particular the gate-widths and gate-lengths of the transistors, of the first and second integrated circuit designs are the same or substantially the same. The second integrated circuit design, when fabricated in the second semiconductor manufacturing process and then operated, experiences less off-state transistor leakage current than does the first integrated circuit design, when fabricated in the first semiconductor manufacturing process, and then operated. Porting includes determining processing targets for the second semiconductor manufacturing process.
机译:移植目标在于在第一半导体制造过程中实施的第一集成电路设计,并在第二半导体制造过程中实施第二电路设计,其中即使第二集成电路的电性能达到或超过第一集成电路设计的要求,第二集成电路设计的阈值电压目标不同于第一集成电路设计的阈值电压目标。并且其中第一和第二集成电路设计的物理布局,特别是晶体管的栅极宽度和栅极长度是相同或基本相同的。当在第二半导体制造工艺中制造然后运行时,与在第一半导体制造工艺中制造然后运行时的第一集成电路设计相比,第二集成电路设计所经历的截止状态晶体管泄漏电流更少。移植包括确定第二半导体制造过程的处理目标。

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