Parallel FET solid state relay utilizing commutation FETs

摘要

A solid state relay circuit is disclosed, containing a first and second group of FETs, the groups being connected in parallel. The first FET group contains commutation FETs capable of handling the commutation load of the circuit. The second FET group contains secondary FETs of lower resistance than the commutation FETs. The circuit is configured such that, when the circuit is activated, the commutation FETs are driven on before the secondary FETs. The circuit is also configured such that, when the circuit is deactivated, the commutation FETs are driven off only after the secondary FETs.