首页> 外国专利> Finding nonequivalent classifiers to reduce ternary content addressable memory (TCAM) usage

Finding nonequivalent classifiers to reduce ternary content addressable memory (TCAM) usage

机译:查找非等效分类器以减少三态内容可寻址内存(TCAM)的使用

摘要

The problem of providing an efficient physical implementation of a (first) classifier defined by a first rule set, at least a part of which first classifier having a sparse distribution in Boolean space, is solved by (1) converting the first classifier, having a corresponding Boolean space, into a second classifier, wherein the second classifier has a corresponding Boolean space which is not semantically equivalent to the Boolean space corresponding to the first classifier, and wherein the second classifier is defined by a second set of rules which is smaller than the first set of rules defining the first classifier; and (2) defining a bit string transformation which transforms a first bit string into a second bit string, wherein applying the first bit string to the first classifier is equivalent to applying the second bit string to the second classifier. In at least some example embodiments, the first bit string includes packet header information. In at least some example embodiments, the second classifier is implemented on a TCAM. In at least some example embodiments, the bit string transformation is implemented on an FPGA.
机译:提供由第一规则集定义的(第一)分类器的有效物理实现的问题,该问题的至少一部分在布尔空间中具有稀疏分布的第一分类器通过以下方式解决:(1)转换具有相应的布尔空间进入第二分类器,其中第二分类器具有对应的布尔空间,该语义在语义上不等同于与第一分类器相对应的布尔空间,并且其中第二分类器由第二组规则定义,该第二组规则小于定义第一分类器的第一组规则; (2)定义将第一位串转换为第二位串的位串变换,其中将第一位串应用于第一分类器等同于将第二位串应用于第二分类器。在至少一些示例实施例中,第一比特串包括分组报头信息。在至少一些示例实施例中,第二分类器在TCAM上实现。在至少一些示例实施例中,位串变换在FPGA上实现。

著录项

  • 公开/公告号US9094350B2

    专利类型

  • 公开/公告日2015-07-28

    原文格式PDF

  • 申请/专利权人 H. JONATHAN CHAO;RIHUA WEI;YANG XU;

    申请/专利号US201313837490

  • 发明设计人 H. JONATHAN CHAO;RIHUA WEI;YANG XU;

    申请日2013-03-15

  • 分类号G06N5/04;H04L12/56;H04L12/743;H04L12/701;H04L12/54;

  • 国家 US

  • 入库时间 2022-08-21 15:18:38

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