A phase-locked loop includes a first semiconductor layer and a second semiconductor layer spaced apart from the first semiconductor layer. The first semiconductor layer has formed thereon a phase frequency detector circuit having a reference frequency input, a feedback frequency input, an up output and a down output, a charge pump circuit having a first input coupled to the up output and a second input coupled to the down output, and an output, and a loop filter circuit coupled to the charge pump. The second semiconductor layer has formed thereon a voltage controlled oscillator having an input and an output, and a feedback frequency divider circuit having an input coupled to the output of the voltage controlled oscillator and an input. A first interlayer via couples the loop filter circuit to the input of the voltage controlled oscillator circuit. A second interlayer via couples the output of the feedback frequency divider circuit to the feedback input of the phase frequency detector.
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