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Packet assembly module for multi-core, multi-thread network processors
Packet assembly module for multi-core, multi-thread network processors
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机译:用于多核,多线程网络处理器的数据包组装模块
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摘要
Described embodiments provide a packet assembler for a network processor. The network processor includes a plurality of processing modules for processing received packets into one or more processed-packet portions. A shared system memory of the network processor receives processed-packet portions corresponding to packet assemblies. Each of the packet assemblies has associated tasks. A packet assembly processor constructs an output packet for each packet assembly from the processed-packet portions in accordance with instructions from the tasks associated with the packet assembly. The packet assembly processor coordinates storage of the processed-packet portions for each output packet that is read from the system memory based on the instructions from the tasks associated with the corresponding packet assembly.
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