Multi phase clock signal generator, signal phase adjusting loop utilizing the multi phase clock signal generator, and multi phase clock signal generating method

摘要

A signal phase adjusting loop comprising a multiphase generator and a phase adjusting circuit. The multiphase generator comprises a ring phase shifting loop having a plurality of output terminals and phase shifting units. The ring phase shifting loop phase-shifts the delayed input clock signal to generate output clock signals with different phases, wherein the output clock signals are respectively output at different output terminals. The phase adjusting circuit receives one of the output clock signals and an input signal to adjust a phase of the input signal according to a phase of the one of the output clock signals.