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Epitaxial technique for reducing of screws located under tension dislocations in half conductor composite materials

机译:外延技术可减少位于半导体复合材料中张力位错下的螺钉

摘要

A solution for fabricating a semiconductor structure is provided. The semiconductor structure includes a plurality of semiconductor layers grown over a substrate using a set of epitaxial growth periods. During each epitaxial growth period, a first semiconductor layer having one of: a tensile stress or a compressive stress is grown followed by growth of a second semiconductor layer having the other of: the tensile stress or the compressive stress directly on the first semiconductor layer. One or more of a set of growth conditions, a thickness of one or both of the layers, and/or a lattice mismatch between the layers can be configured to create a target level of compressive and/or shear stress within a minimum percentage of the interface between the layers.
机译:提供了一种用于制造半导体结构的解决方案。半导体结构包括使用一组外延生长周期在衬底上方生长的多个半导体层。在每个外延生长周期中,在第一半导体层上直接生长具有以下其中之一的第一半导体层:拉应力或压缩应力,然后生长具有另一个中的另一半导体应力的第二半导体层:拉伸应力或压缩应力。一组生长条件中的一个或多个,一个或两个层的厚度和/或两个层之间的晶格失配可以配置为在最小百分比的压缩应力和/或剪切应力的范围内产生目标水平的压缩应力和/或剪切应力。层之间的接口。

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