EFFECTIVE ERROR CORRECTION OF MULTI-BIT ERRORS

摘要

An error correcting circuit includes a plurality of subcircuits for determining intermediate values Zw0, Zw1, Zw2, Zw3 to be used as coefficients in an error correcting expression. The intermediate values Zw0, Zw1, Zw2, Zw3 are determined depending on sub-syndromes s1, s3, s5, so that in the case of a 1-bit, 2-bit or 3-bit error, zi2, ..., zim) = (0, 0, ..., 0), if an error has occurred at the bit position i, and, zi2, ..., zim) ≠ (0, 0, ... 0), if no error is present the bit position i has occurred. A correction value for the bit position i may then be determined based on the re-evaluated error correction term.