PLL frequency synthesizer, a semiconductor integrated device and wireless communication equipment

摘要

PROBLEM TO BE SOLVED: To provide a PLL frequency synthesizer, a semiconductor integrated device and radio communication equipment, capable of accurately detecting a PLL lock condition.SOLUTION: When the phase of a frequency division signal obtained by dividing an output oscillation signal frequency advances from a reference oscillation signal phase, a phase frequency detector 11 of a PLL frequency synthesizer generates a first phase difference signal including a pulse having a pulse width corresponding to a phase difference between both signals, whereas when the phase of the frequency division signal delays from the reference oscillation signal phase, the phase frequency detector 11 generates a second phase difference signal including a pulse having a pulse width corresponding to the phase difference between both signals. At this time, a lock detection circuit 15 determines whether or not PLL is in a lock state, on the basis of the magnitude of a differential value between the pulse width of the first phase difference signal and the pulse width of the second phase difference signal.