VERTICAL P-TYPE, N-TYPE, P-TYPE (PNP) JUNCTION INTEGRATED CIRCUIT (IC) STRUCTURE, AND METHODS OF FORMING

摘要

Various particular embodiments include a method of amorphizing a portion of silicon underneath the N+ base section of a PNP transistor structure. After amorphizing, the method can include selectively etching that implant-amorphized silicon to trim the collector-base area and collector-base junction. The selective etching is enhanced because the unimplanted silicon region etches at a distinct rate than the implant-amorphized silicon, allowing for control over the trimming of the collector-base junction.