首页> 外国专利> METHODS AND SYSTEMS FOR IMPLEMENTING HIGH SPEED SERIAL INTERFACE BUS HAVING INHOMOGENEOUS LANE BUNDLES AND ENCODINGS

METHODS AND SYSTEMS FOR IMPLEMENTING HIGH SPEED SERIAL INTERFACE BUS HAVING INHOMOGENEOUS LANE BUNDLES AND ENCODINGS

机译:实现具有不均匀车道束和编码的高速串行接口总线的方法和系统

摘要

The present disclosure relates to methods and systems for implementing a high-speed serial bus with inhomogeneous lane bundles and encodings. A system for transmitting information can include a bus with a plurality of lanes and a host in communication with a target. The host can run an application that writes data to and reads data from storage. The host can assign a first plurality of lanes and a first encoding to a first bundle and assign a second plurality of lanes and a second encoding to a second bundle. The host can also evaluate a bandwidth requirement for the read and write instructions and evaluate a bus performance. The host can also regroup the first bundle or the second bundle based on bandwidth requirements and bus performance and can assign a third plurality of lanes and a third encoding to the at least one of the first bundle and the second bundle.
机译:本公开涉及用于利用不均匀的通道束和编码来实现高速串行总线的方法和系统。用于发送信息的系统可以包括具有多个车道的总线和与目标进行通信的主机。主机可以运行将数据写入存储并从中读取数据的应用程序。主机可以将第一多个通道和第一编码分配给第一束,并且可以将第二多个通道和第二编码分配给第二束。主机还可以评估读写指令的带宽要求,并评估总线性能。主机还可以基于带宽需求和总线性能将第一束或第二束重新分组,并且可以将第三多个通道和第三编码分配给第一束和第二束中的至少一个。

著录项

  • 公开/公告号US2016292125A1

    专利类型

  • 公开/公告日2016-10-06

    原文格式PDF

  • 申请/专利权人 HGST NETHERLANDS B.V.;

    申请/专利号US201615090249

  • 发明设计人 DEJAN VUCINIC;ZVONIMIR Z. BANDIC;

    申请日2016-04-04

  • 分类号G06F13/42;G06F11/34;G06F11/30;

  • 国家 US

  • 入库时间 2022-08-21 14:34:21

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