首页>
外国专利>
Instruction scheduling for reducing register usage based on dependence depth and presence of sequencing edge in data dependence graph
Instruction scheduling for reducing register usage based on dependence depth and presence of sequencing edge in data dependence graph
展开▼
机译:基于依赖深度和数据依赖图中序列边缘的存在来减少寄存器使用的指令调度
展开▼
页面导航
摘要
著录项
相似文献
摘要
A method, computer program product, and system are provided for scheduling a plurality of instructions in a computing system. For example, the method can generate a plurality of instruction lineages, in which the plurality of instruction lineages is assigned to one or more registers. Each of the plurality of instruction lineages has at least one node representative of an instruction from the plurality of instructions. The method can also determine a node order based on respective priority values associated with each of the nodes. Further, the method can include scheduling the plurality of instructions based on the node order and the one or more registers assigned to the one or more registers.
展开▼