Common die for supporting different external memory types with minimal packaging complexity

摘要

A configurable die including a logic element configured to communicate a control and address (CA) signal and a data (DQ) signal, and a first generic physical interface (PHY) and a second generic PHY in communication with the logic element, wherein each of the first generic PHY and the second generic PHY is configurable as a CA PHY and as a DQ PHY, and wherein the logic element is configurable to communicate the CA signal and the DQ signal to different ones of the first and second generic PHYs.