CIRCUITS FOR VOLTAGE OR CURRENT BIASING STATIC RANDOM ACCESS MEMORY (SRAM) BITCELLS DURING SRAM RESET OPERATIONS, AND RELATED SYSTEMS AND METHODS

摘要

The SRAM reset during the operation of a static random access memory (SRAM) bitcell voltage or current via a circuit for dicing is started. Are related to systems and methods are also disclosed. To reset a plurality of SRAM bit cell in a single reset operation, provided by the biasing circuit is coupled to a plurality of SRAM bit cell ring. Since a reduced in a reduced power level of the power SRAM bit less than operating power level of the cell is provided to the SRAM bit cells, the biasing circuit consists of a voltage or current bias to the bit cells of the RAM during a reset operation to apply. When it is restored to the SRAM bit cell operating power level of the power for the bias it is applied, thus forcing them to a desired state SRAM bit cells. In this way, SRAM bit cells without the need for an increase in drive strength from the reset circuit and can be reset in a single reset operation without the need to provide special SRAM bit cells. ;