0 1 Low Power Wideband Non-Coherent BPSK Demodulator to Align the Phase of Sideband Differential Output Comparators for Reducing Jitter using 1st Order Sideband Filters with Phase 0 Degree Alignment

摘要

An embodiment of the present invention relates to a broadband asynchronous BPSK demodulation method for low power and its circuit configuration. In the configuration of the BPSK demodulation circuit, the modulated signal is separated into an upper band and a lower band through a first-order high-pass filter and a first-order low-pass filter whose cutoff frequency is a carrier frequency, And outputs the lower sideband digital signals and the upper sideband digital signals which are delayed by ¼ period of the carrier frequency while increasing the yield by minimizing jitter by using two pairs of signals whose phases are the same as the digital output of the upper band comparator A sideband separation and an upper sideband signal delay unit; The phase difference between the delayed upper sideband positive phase digital signal and the lower sideband positive phase digital signal is aligned at 0 ^o and at the same falling edge as the rising edge so that a first symbol edge signal with reduced glitch is generated , The phase difference between the delayed upper sideband digital signal and the lower sideband digital signal is aligned at 0 ^o and at the same falling edge as the rising edge, thereby generating a second symbol edge signal with reduced glitches Thereby generating a glitch-free symbol edge clock through a deglitch filter and further reducing the glitch by overlapping the first symbol edge signal and the second symbol edge signal through an AND gate, A data demodulator for demodulating the data by synchronizing with the rising edge of the data; And a data clock recovery unit for generating a data clock using the lower sideband positive phase digital signal and the demodulated data signal, may be provided.