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Electrode materials and interfacial layers to minimize chalcogenide interface resistance

机译:电极材料和界面层可最小化硫族化物界面电阻

摘要

A phase change memory cell having a reduced electrode-chalcogenide interface resistance and a method of fabricating the phase change memory cell are disclosed: An interface layer is formed between an electrode layer and a chalcogenide layer that provides a reduced resistance between the chalcogenide-based phase change memory layer and the electrode layer. Exemplary embodiments contemplate that the interface layer comprises a tungsten carbide, a molybdenum carbide, a tungsten boride or a molybdenum boride or a combination thereof. In an exemplary embodiment, the interfacial layer has a thickness of between about 1 nm and about 10 nm.
机译:公开了具有减小的电极-硫族化物界面电阻的相变存储单元及其制造方法:在电极层和硫族化物层之间形成界面层,该界面层在基于硫族化物的相之间提供减小的电阻。改变存储层和电极层。示例性实施例预期界面层包括碳化钨,碳化钼,硼化钨或硼化钼或其组合。在示例性实施例中,界面层的厚度在约1nm至约10nm之间。

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