System and method for reducing system-on-chip leakage power using integrated thermoelectric cooling

摘要

A system, method, and computer program for reducing system-on-chip (SoC) leakage power are disclosed. One such method includes monitoring a plurality of temperature differences across each plurality of thermoelectric coolers on a system on chip (SoC). Each thermoelectric cooler is dedicated to a corresponding one of multiple chip sections on the SoC. The thermoelectric cooler is controlled based on the temperature differences to minimize the sum of the combined power consumption of the chip sections and the corresponding dedicated thermoelectric coolers.