SYSTEMS AND METHODS FOR REDUCING LEAKAGE POWER OF A SYSTEM ON CHIP WITH INTEGRATED THERMOELECTRIC COOLING

摘要

Systems, methods, and computer programs for reducing the leakage power of a system-on-chip (SoC) are disclosed. One such method involves monitoring a plurality of temperature differences across each of a plurality of thermoelectric coolers on a system-on-chip (SoC). Each of the thermoelectric coolers is dedicated to a corresponding one of a plurality of chip sections on the SoC. The thermoelectric coolers are controlled based on the plurality of temperature differences to minimize the sum of the combined power consumption of the plurality of chip sections and the plurality of corresponding dedicated thermoelectric coolers.