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High-density SRAM array design with skipped interlayer conductive contacts

机译:具有跳过的层间导电触点的高密度SRAM阵列设计

摘要

A static random access memory (SRAM) cell includes a first conductive layer including word line landing pads extending into neighboring memory cells in adjacent rows of the memory array. The word line landing pads in the first conductive layer are electrically isolated from all the gate contacts of neighboring memory cells. The SRAM cell also includes a second conductive layer including a word line coupled to a word line landing pad in the first conductive layer. The SRAM cell further includes a first via coupling the gate contact of the pass transistor gate in the SRAM cell to the word line landing pad in the first conductive layer. The SRAM cell also includes a second via which couples the word line landing pad and the word line of the second conductive layer.
机译:静态随机存取存储器(SRAM)单元包括第一导电层,该第一导电层包括延伸到存储器阵列的相邻行中的相邻存储器单元中的字线连接盘。第一导电层中的字线着陆焊盘与相邻存储单元的所有栅极触点电隔离。 SRAM单元还包括第二导电层,该第二导电层包括耦接到第一导电层中的字线接合焊盘的字线。 SRAM单元还包括第一通路,该第一通路将SRAM单元中的传输晶体管栅极的栅极接触耦合到第一导电层中的字线连接焊盘。 SRAM单元还包括第二通路,第二通路耦合字线连接盘和第二导电层的字线。

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