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Floating-gate transistor array for performing weighted sum computation

机译:用于执行加权和计算的浮栅晶体管阵列

摘要

A weighted sum is a key computation for many neural networks and other machine learning algorithms. Integrated circuit designs that perform a weighted sum are presented. Weights are stored as threshold voltages in an array of flash transistors. By putting the circuits into a well-defined voltage state, the transistors that hold one set of weights will pass current equal to the desired sum. The current flowing through a given transistor is unaffected by operation of remaining transistors in the circuit.
机译:加权和是许多神经网络和其他机器学习算法的关键计算。给出了执行加权和的集成电路设计。权重作为阈值电压存储在闪存晶体管阵列中。通过将电路置于明确定义的电压状态,保持一组权重的晶体管将通过等于所需总和的电流。流过给定晶体管的电流不受电路中其余晶体管工作的影响。

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