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BACKGROUND CALIBRATION OF INTERLEAVE TIMING ERRORS IN TIME-INTERLEAVED ANALOG TO DIGITAL CONVERTERS
BACKGROUND CALIBRATION OF INTERLEAVE TIMING ERRORS IN TIME-INTERLEAVED ANALOG TO DIGITAL CONVERTERS
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机译:时间交错模拟到数字转换器中交错时序误差的背景校准
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摘要
A method for performing background calibration of interleave timing errors in N order Time-Interleaved Analog to Digital Converters (TIADCs), according to which N samples of the input signal are acquired in N different phases and the time-interleave error of each phase is calculated. Then the sign of each of the time-interleave error is extracted and the errors are adjusted by adjusting the timing of erroneous phases. This process is repeated until all the errors are lower than a predefined level.
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