Devices and methods of fabricating vertical field effect transistors on semiconductor devices are provided. One intermediate semiconductor includes: a substrate, a bottom spacer layer above the substrate, a plurality of fins, wherein at least one fin is an n-fin and at least one fin is a p-fin; a high-k layer and a work function metal over the bottom spacer layer and around the plurality of fins; a top spacer above the high-k layer and the work function metal and surrounding a top area of the fins; a top source/drain structure over each fin; a dielectric capping layer over the top source/drain structure; a fill metal surrounding the work function metal; and a liner.
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