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Semiconductor memory device for performing both of static test and dynamic test during wafer burn-in test and method for operating the same
Semiconductor memory device for performing both of static test and dynamic test during wafer burn-in test and method for operating the same
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机译:在晶片老化测试期间执行静态测试和动态测试的半导体存储器件及其操作方法
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摘要
A semiconductor memory device includes a first address input block which receives first information applied from an exterior as a corresponding normal address in a normal mode and receives the first information as a test clock in a test mode, a second address input block which receives second information applied from an exterior as the corresponding normal address in the normal mode and receives the second information as a test code in the test mode, and a test signal generation block which synchronizes the test code with the test clock in the test mode and generates a test command, a test address and a test data in response to a synchronized test code.
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