首页> 外国专利> Semiconductor memory device for performing both of static test and dynamic test during wafer burn-in test and method for operating the same

Semiconductor memory device for performing both of static test and dynamic test during wafer burn-in test and method for operating the same

机译:在晶片老化测试期间执行静态测试和动态测试的半导体存储器件及其操作方法

摘要

A semiconductor memory device includes a first address input block which receives first information applied from an exterior as a corresponding normal address in a normal mode and receives the first information as a test clock in a test mode, a second address input block which receives second information applied from an exterior as the corresponding normal address in the normal mode and receives the second information as a test code in the test mode, and a test signal generation block which synchronizes the test code with the test clock in the test mode and generates a test command, a test address and a test data in response to a synchronized test code.
机译:半导体存储装置包括:第一地址输入块,其在正常模式下接收从外部施加的第一信息作为对应的正常地址,并且在测试模式下接收第一信息作为测试时钟;第二地址输入块,其接收第二信息在正常模式下从外部作为对应的正常地址被施加,并在测试模式下接收第二信息作为测试代码,以及在测试模式下使测试代码与测试时钟同步并生成测试的测试信号生成块命令,测试地址和响应于同步测试代码的测试数据。

著录项

  • 公开/公告号US9520203B2

    专利类型

  • 公开/公告日2016-12-13

    原文格式PDF

  • 申请/专利权人 SK HYNIX INC.;

    申请/专利号US201414546720

  • 发明设计人 SUNG-YUB LEE;GEUN-IL LEE;

    申请日2014-11-18

  • 分类号G11C29;G11C29/06;G11C7/10;G11C7/22;G11C29/12;G11C29/26;

  • 国家 US

  • 入库时间 2022-08-21 13:44:04

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