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System with a high power chip and a low power chip having low interconnect parasitics
System with a high power chip and a low power chip having low interconnect parasitics
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机译:具有具有低互连寄生效应的高功率芯片和低功率芯片的系统
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摘要
An IC system includes low-power chips, e.g., memory chips, located proximate one or more higher power chips, e.g., logic chips, without suffering the effects of overheating. The IC system may include a high-power chip disposed on a packaging substrate and a low-power chip embedded in the packaging substrate to form a stack. Because portions of the packaging substrate thermally insulate the low-power chip from the high-power chip, the low-power chip can be embedded in the IC system in close proximity to the high-power chip without being over heated by the high-power chip. Such close proximity between the low-power chip and the high-power chip advantageously shortens the path length of interconnects therebetween, which improves device performance and reduces interconnect parasitics in the IC system.
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