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SHEET FOR PRODUCING THREE-DIMENSIONAL INTEGRATED LAMINATED CIRCUIT AND METHOD FOR PRODUCING THREE-DIMENSIONAL INTEGRATED LAMINATED CIRCUIT
SHEET FOR PRODUCING THREE-DIMENSIONAL INTEGRATED LAMINATED CIRCUIT AND METHOD FOR PRODUCING THREE-DIMENSIONAL INTEGRATED LAMINATED CIRCUIT
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机译:制作三维整体叠层电路的表格和制作三维整体叠层电路的方法
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摘要
This sheet 1 for producing a three-dimensional integrated laminated circuit, which is interposed between a plurality of semiconductor chips having through-electrodes and is used to adhere the semiconductor chips to each other and obtain a three-dimensional integrated laminated circuit, is provided with at least a curable adhesive layer 13, wherein the material that constitutes the adhesive layer 13 has a pre-curing melt viscosity at 90 °C of 1.0×100-5.0×105 Pa·s, and the cured product has an average linear expansion coefficient at 0-130 °C of 45 ppm or less. This sheet 1 for producing a three-dimensional integrated laminated circuit can be used to produce a three-dimensional integrated laminated circuit in which connection resistance between the semiconductor chips does not easily change and which is highly reliable.
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