PCB substrate having blind via and method of testing electric current through blind via and method of manufacturing semiconductor package

摘要

A method for manufacturing a semiconductor package having a blind via according to an embodiment of the present invention comprises: providing a strip substrate which includes a plurality of unit substrate regions disposed with a peripheral region therebetween and having at least one blind via, a peripheral conductive pattern layer disposed in the peripheral region, and a connection pattern layer for electrically connecting the blind vias to the peripheral conductive pattern layer; disposing semiconductor chips on the unit substrate regions; and forming conductive wires to electrically connect connection pads disposed on the unit substrate regions to bonding pads disposed on the semiconductor chips. The connection pad is electrically connected to the blind via. When forming the conductive wire, an electric current test for a path from at least a portion of the conductive wire to the peripheral conductive pattern layer via the unit substrate region is performed.