SPLIT-GATE FLASH MEMORY CELL WITH IMPROVED SCALING USING ENHANCED LATERAL CONTROL GATE TO FLOATING GATE COUPLING

摘要

The non-volatile memory cell includes a semiconductor substrate of a first conductivity type and first and second spaced regions in the substrate of a second conductivity type, wherein the channel region is within the substrate between them. The floating gate has a first portion vertically disposed over the first portion of the channel region and a second portion vertically disposed over the first region. The floating gate includes a sloped top surface terminated with one or more sharp edges. An erase gate is vertically disposed over the floating gate with one or more edges facing the erase gate. The control gate has a first portion laterally adjacent to the floating gate and vertically above the first region. The select gate has a first portion vertically disposed on the second portion of the channel region and laterally adjacent to the floating gate.