-DRAM MECHANISM ENABLING THE USE OF SLOW MEMORY TO ACHIEVE BYTE ADDRESSABILITY AND NEAR-DRAM PERFORMANCE WITH PAGE REMAPPING SCHEME

摘要

Memory systems include a memory storage including a dynamic random access memory (DRAM) portion, a non-volatile memory (NVM) portion, and a virtual memory (VM); A software page remapping kernel driver (SPRKD) suitable for intercepting a memory management instruction including access to the virtual address location of the VM and remapping the virtual address location from the real address of the NVM portion mapped to the virtual address location to the real address of the DRAM portion ); And a controller adapted to execute the memory management command by accessing the actual address of the DRAM portion to which the virtual address location is remapped.