首页>
外国专利>
MECHANISM ENABLING THE USE OF SLOW MEMORY TO ACHIEVE BYTE ADDRESSABILITY AND NEAR-DRAM PERFORMANCE WITH PAGE REMAPPING SCHEME
MECHANISM ENABLING THE USE OF SLOW MEMORY TO ACHIEVE BYTE ADDRESSABILITY AND NEAR-DRAM PERFORMANCE WITH PAGE REMAPPING SCHEME
展开▼
机译:通过页面重新映射方案,可以利用慢速存储来实现字节可寻址性和近DRAM性能的机制
展开▼
页面导航
摘要
著录项
相似文献
摘要
Memory systems may include a memory storage including a dynamic random access memory (DRAM) portion, a non-volatile memory (NVM) portion, and a virtual memory (VM), a software page remapping kernel driver (SPRKD) suitable for intercepting a memory management command, the memory management command including an access to a virtual address location of the VM, and remapping the virtual address location from a physical address of the NVM portion mapped to the virtual address location to a physical address of the DRAM portion, and a controller suitable for executing the memory management command by accessing the physical address of the DRAM portion to which the virtual address location is remapped.
展开▼