INGAAS EPI ART III-V GAA INGAAS EPI STRUCTURE AND WET ETCH PROCESS FOR ENABLING III-V GAA IN ART TRENCH

摘要

Embodiments of the present invention include nanowire and nanoribbon transistors and methods of forming such transistors. According to one embodiment, a method of forming a microelectronic device may comprise forming a multi-layer stack in a trench formed in a shallow trench isolation (STI) layer. The multi-layer stack may include at least a channel layer, a release layer formed under the channel layer, and a buffer layer formed under the channel layer. The STI layer may be recessed such that the top surface of the STI layer is below the top surface of the release layer. The release layer is exposed from below the channel layer by selectively etching the release layer with respect to the channel layer.