METHODS AND APPARATUS FOR CONGESTIONAWARE BUFFERING USING VOLTAGE ISOLATION PATHWAYS FOR INTEGRATED CIRCUIT DESIGNS WITH MULTIPOWER DOMAINS

摘要

By restricting the placement of these buffers in the patterned regions associated with the second power domain, it is routed through one or more regions associated with the first power domain 452, which is different from the second power domain associated with the buffers and the nets being buffered A semiconductor device for buffering the nets 412 is provided herein. This provides routing of buffered nets that will be determined based on the shortest distance from point A to point B, as well as routing congestion on the semiconductor device. As a result, if the area on the semiconductor device is congested, the buffered nets can be routed around congestion. Thereby, even if the path taken by the specific signal through the integrated circuit is not a direct route, the path may still have a distance to support the speed at which a particular signal needs to be transmitted.