首页> 外国专利> Chained two-wire data bus consisting of two single-wire data buses, each with several differential levels for bidirectional transmission of lighting data based on the JTAG protocol

Chained two-wire data bus consisting of two single-wire data buses, each with several differential levels for bidirectional transmission of lighting data based on the JTAG protocol

机译:链式两线数据总线,由两个单线数据总线组成,每个总线具有几个差分级别,用于基于JTAG协议的照明数据双向传输

摘要

The invention relates to a light module and the matching a housing (GH) for a bus node (BSn) in the form of an integrated circuit. The light module is intended to be used in a data bus system for transmitting illumination data for light sources (LED1, LED2, LED3) by means of a differential two-wire data bus (b1, b2, b3), wherein the differential two-wire data bus (b1, b2, b3) forms an integral part of the light module concept is. The two-wire data bus (b1, b2, b3) is provided for the transmission of data between a bus master (BM) and between at least two bus nodes (BS1, BS2, BS3). The two-wire data bus (b1, b2, b3) is divided by the bus nodes (BS1, BS2, BS3) into at least two two-wire data bus portions (b1, b2, b3). The bus nodes (BS2, BS3) are provided by a preceding two-wire data bus section (b2, b3) of the two-wire data bus sections (b1, b2, b3) with a preceding bus node (BS1, BS2) of the bus nodes (BS1, BS2, BS3) or the bus master (BM) to be connected. The housing (GH) of the bus node (BSn) has at least two rows of terminals, a first row of terminals (GND, b1a, b1b, Vbat) and a second row of terminals (GND, b2a, b2b, Vbat). At least these at least two rows of terminals on the housing (GH) are arranged opposite one another. Each of the terminal rows comprises a terminal (GND) for the negative supply voltage and preferably a terminal (Vbat) for the positive supply voltage, which are arranged in each terminal row, that they can be connected in pairs according to their function without crossing. The respective two connections (b1a, b1b) for the respective two-wire data bus sections (b1, b2) are arranged between the connections for the supply voltages in each case one terminal row. A light source (LED1, LED2, LED3) is arranged in a recess (ASP) of the housing.
机译:本发明涉及一种光模块,并且该光模块与用于集成电路形式的总线节点(BSn)的壳体(GH)匹配。该光模块旨在用于数据总线系统中,以通过差分两线数据总线(b1,b2,b3)传输光源(LED1,LED2,LED3)的照明数据,其中,差分两线制有线数据总线(b1,b2,b3)构成了照明模块概念的组成部分。提供两线数据总线(b1,b2,b3)用于在总线主机(BM)之间以及至少两个总线节点(BS1,BS2,BS3)之间传输数据。两线数据总线(b1,b2,b3)被总线节点(BS1,BS2,BS3)分成至少两个两线数据总线部分(b1,b2,b3)。总线节点(BS2,BS3)由两线数据总线部分(b1,b2,b3)的前两线数据总线部分(b2,b3)和前者的总线节点(BS1,BS2)提供。要连接的总线节点(BS1,BS2,BS3)或总线主机(BM)。总线节点(BSn)的外壳(GH)具有至少两排端子,第一排端子(GND,b1a,b1b,Vbat)和第二排端子(GND,b2a,b2b,Vbat)。壳体(GH)上的至少这至少两排端子彼此相对布置。每个端子排包括用于负电源电压的端子(GND),优选包括用于正电源电压的端子(Vbat),它们布置在每个端子排中,使得它们可以根据其功能成对连接而不交叉。用于两线数据总线部分(b1,b2)的相应的两个连接(b1a,b1b)被布置在用于电源电压的连接之间,在每种情况下为一个端子排。光源(LED1,LED2,LED3)布置在壳体的凹槽(ASP)中。

著录项

  • 公开/公告号DE102017100718A1

    专利类型

  • 公开/公告日2017-07-20

    原文格式PDF

  • 申请/专利权人 ELMOS SEMICONDUCTOR AKTIENGESELLSCHAFT;

    申请/专利号DE201710100718

  • 发明设计人 CHRISTIAN SCHMITZ;

    申请日2017-01-16

  • 分类号H04L12/403;

  • 国家 DE

  • 入库时间 2022-08-21 13:22:05

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