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LED verticle chip structure with special coarsening morphology and preparation method therefor

机译:具有特殊粗化形态的led垂直芯片结构及其制备方法

摘要

A method for improving luminous efficiency of an LED in a vertical structure. First, an LED vertical chip structure with a special coarsening morphology is provided, and micron-scale holes (311) are formed in the surface of an epitaxial structure layer (300) and submicron-scale holes (312) are formed at the bottom of the micron-scale holes. The light emitting surface structure can increase the emission probability of light inside a device, and can greatly improve the light emission efficiency. Also provided is a preparation method for the chip structure. Micron-scale holes (311) are formed in an epitaxial structure layer (300) by stripping a growth substrate (100) with micron-scale bumps, and submicron-scale holes (312) are formed at the bottom of the micron-scale holes (311) by means of etching. The method is simple in process, can be applied to large-scale industrial production, and can greatly improve the luminous efficiency of the LED in the vertical structure.
机译:一种用于提高垂直结构中的LED的发光效率的方法。首先,提供具有特殊的粗化形态的LED垂直芯片结构,并且在外延结构层(300)的表面中形成微米级的孔(311),并且在其底部形成亚微米级的孔(312)。微米级的孔。发光表面结构可以增加装置内部的光发射概率,并且可以大大提高发光效率。还提供了一种芯片结构的制备方法。通过剥离具有微米级隆起的生长衬底(100),在外延结构层(300)中形成微米级孔(311),并且在微米级孔的底部形成亚微米级孔(312)。 (311)通过蚀刻的方式。该方法工艺简单,可以应用于大规模的工业生产,可以大大提高垂直结构中LED的发光效率。

著录项

  • 公开/公告号GB201704361D0

    专利类型

  • 公开/公告日2017-05-03

    原文格式PDF

  • 申请/专利权人 ENRAYTEK OPTOELECTRONICS CO. LTD.;

    申请/专利号GB20170004361

  • 发明设计人

    申请日2015-09-14

  • 分类号H01L33;

  • 国家 GB

  • 入库时间 2022-08-21 13:20:59

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