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MEMORY DEVICE, CONTROLLER, HOST DEVICE, DATA PROCESSING SYSTEM, CONTROL PROGRAM, METHOD OF OPERATING MEMORY DEVICE AND METHOD OF OPERATING HOST DEVICE

机译:存储器设备,控制器,主机设备,数据处理系统,控制程序,操作存储器设备的方法和操作主机设备的方法

摘要

PROBLEM TO BE SOLVED: To provide a technique capable of improving the performance of a memory device.SOLUTION: A controller in a first mode (a standby mode) causes an erasure unit area of a first physical address associated with a first logical address in a first table to be an erasure standby area when receiving an erasure command and the first logical address. The controller in the first mode replaces the first physical address with a physical address allocated to an erased area in the first table. The controller in a second mode (an IE mode) sets the erasure standby area in the erased area. The controller changes an operation mode to a third mode (an RIE mode) when receiving a release command to instruct to release the second mode while erasing data of the erasure standby area from a host device. The controller erases unerased data of the erasure standby area, and changes the operation mode from the third mode to the first mode in the case of operating in the third mode.SELECTED DRAWING: Figure 4
机译:解决的问题:提供一种能够提高存储设备性能的技术。解决方案:处于第一模式(待机模式)的控制器导致与第一逻辑地址相关联的第一物理地址的擦除单元区域在存储器中。当接收到擦除命令和第一逻辑地址时,第一表成为擦除待机区。在第一模式下的控制器将第一物理地址替换为分配给第一表中的擦除区域的物理地址。处于第二模式(IE模式)的控制器将擦除待机区域设置在擦除区域中。当从主机设备擦除擦除待机区域的数据时,控制器接收到指示释放第二模式的释放命令时,控制器将操作模式改变为第三模式(RIE模式)。控制器擦除擦除待机区中未擦除的数据,并在以第三模式操作的情况下将操作模式从第三模式更改为第一模式。

著录项

  • 公开/公告号JP2018097516A

    专利类型

  • 公开/公告日2018-06-21

    原文格式PDF

  • 申请/专利权人 MEGA CHIPS CORP;

    申请/专利号JP20160240341

  • 发明设计人 KISHIDA HARUNOBU;IMAGAWA MASAYUKI;

    申请日2016-12-12

  • 分类号G06F12/02;G06F12;

  • 国家 JP

  • 入库时间 2022-08-21 13:12:48

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