首页> 外国专利> SELF-TESTABLE INTEGRATED CIRCUIT DEVICE AND METHOD FOR SELF-TESTING INTEGRATED CIRCUIT

SELF-TESTABLE INTEGRATED CIRCUIT DEVICE AND METHOD FOR SELF-TESTING INTEGRATED CIRCUIT

机译:自测试集成电路装置及用于自测试集成电路的方法

摘要

PROBLEM TO BE SOLVED: To provide a method for self-testing a testable logic.SOLUTION: A testable logic 206 includes multiple scan channels 202-204 coupled operatively between a pattern generator 200 and a result store 205. A self-test controller 118 is configured to generate self-test result data, and to supervise the self-test related to a testable logic, and the self-test result data is stored in the result store. A process resource 108 is also coupled operatively to the self-test controller, and coupled operatively between a pattern generator 212 and the result store, and can evaluate the self-test result data stored in the result store. The process resource is configured to cooperate with the self-test controller, so that the self-test is also related to the process resource, and the process resource can evaluate the self-test result data after self test.SELECTED DRAWING: Figure 2
机译:解决的问题:提供一种用于自测试可测试逻辑的方法。解决方案:可测试逻辑206包括可操作地耦合在模式发生器200和结果存储205之间的多个扫描通道202-204。自测试控制器118是配置为生成自测结果数据,并监督与可测试逻辑相关的自测,并将自测结果数据存储在结果存储区中。处理资源108也可操作地耦合到自测试控制器,并且可操作地耦合在模式生成器212和结果存储之间,并且可以评估存储在结果存储中的自测试结果数据。流程资源配置为与自检控制器配合使用,以便自检也与流程资源相关,并且流程资源可以在自检后评估自检结果数据。选定的图:图2

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号