MULTIPLE LEVEL NAND MEMORY DEVICE AND NON-ERASURE REPROGRAMMING METHOD USING CAPACITY OF MULTIPLE LEVEL NAND MEMORY CELL

摘要

PROBLEM TO BE SOLVED: To reduce write time, write amplification, and erasure/reading/write cycles by executing a plurality of reprogramming operations by an NAND memory cell without any intermediate erasure cycle.SOLUTION: A memory device comprises: one or more memory pages; a program logic section; and a memory control logic section including page level reprogramming state meta data. One or more memory pages include a plurality of memory cells, and each of the plurality of memory cells has a plurality of programmable state levels. The program logic section is configured to program a plurality of memory cells in accordance with the page level reprogramming state meta data, and to program a first state level, a second state level and a third state level of each of the plurality of memory cells by continuous programming operations of the memory cells in accordance with the page level reprogramming state meta data without requiring any erasing operation or reading operation in the programming operation or during the programming operation.SELECTED DRAWING: Figure 2