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Fabrication of a vertical fin field effect transistor (vertical finFET) with a self-aligned gate and fin edges
Fabrication of a vertical fin field effect transistor (vertical finFET) with a self-aligned gate and fin edges
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机译:具有自对准栅极和鳍片边缘的垂直鳍片场效应晶体管(vertical finFET)的制造
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摘要
A method of forming a vertical fin field effect transistor with a self-aligned gate structure, comprising forming a plurality of vertical fins on a substrate, forming gate dielectric layers on opposite sidewalls of each vertical fin, forming a gate fill layer between the vertical fins, forming a fin-cut mask layer on the gate fill layer, forming one or more fin-cut mask trench(es) in the fin-cut mask layer, and removing portions of the gate fill layer and vertical fins not covered by the fin-cut mask layer to form one or more fin trench(es), and two or more vertical fin segments from each of the plurality of vertical fins, having a separation distance, D1, between two vertical fin segments.
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