Encoder having phase adjuster for offsetting phases of multi-phase input signal

摘要

A resistor string outputs sixteen signals with a phase difference of 22.5° by dividing voltage between two adjacent phases of a four-phase input signal with a phase difference of 2π/M (where M is an integer equal to or greater than 2), and by generating four signals with a delayed phase for each phase of the four-phase input signal. A switch portion selects four signals with a phase difference of 90° from the sixteen signals. Amplifiers output each of the four signals, which are attenuated by dividing the voltage with the resistor string, as a four-phase output signal by amplifying each of the four signals such that an amplitude of the four signals matches the amplitude of the four-phase input signal.