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Nanowire channel structures of continuously stacked nanowires for complementary metal oxide semiconductor (CMOS) devices

机译:用于互补金属氧化物半导体(CMOS)器件的连续堆叠纳米线的纳米线通道结构

摘要

Nanowire channel structures of continuously stacked nanowires for complementary metal oxide semiconductor (CMOS) devices are disclosed. In one aspect, an exemplary CMOS device includes a nanowire channel structure that includes a plurality of continuously stacked nanowires. Vertically adjacent nanowires are connected at narrow top and bottom end portions of each nanowire. Thus, the nanowire channel structure comprises a plurality of narrow portions that are narrower than a corresponding plurality of central portions. A wrap-around gate material is disposed around the nanowire channel structure, including the plurality of narrow portions, without entirely wrapping around any nanowire therein. The exemplary CMOS device provides, for example, a larger effective channel width and better gate control than a conventional fin field-effect transistor (FET) (FinFET) of a similar footprint. The exemplary CMOS device further provides, for example, a shorter nanowire channel structure than a conventional nanowire FET.
机译:公开了用于互补金属氧化物半导体(CMOS)器件的连续堆叠的纳米线的纳米线沟道结构。一方面,示例性CMOS器件包括纳米线沟道结构,该纳米线沟道结构包括多个连续堆叠的纳米线。垂直相邻的纳米线在每个纳米线的狭窄的顶端和底端部分连接。因此,纳米线沟道结构包括比相应的多个中心部分窄的多个窄部分。环绕栅材料设置在包括多个窄部分的纳米线沟道结构周围,而没有完全环绕其中的任何纳米线。与具有类似覆盖区的常规鳍式场效应晶体管(FET)(FinFET)相比,示例性CMOS器件提供了例如更大的有效沟道宽度和更好的栅极控制。该示例性CMOS器件还提供例如比常规纳米线FET更短的纳米线沟道结构。

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