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Method, apparatus and system for back gate biasing for FD-SOI devices

机译:FD-SOI器件的背栅偏置的方法,装置和系统

摘要

At least one method, apparatus and system disclosed involves providing semiconductor device having transistors comprising back gates and front gates. The semiconductor device comprises a signal processing unit for processing an input signal to provide an output signal. The signal processing unit includes a first transistor and a second transistor. The first transistor includes a first back gate electrically coupled to a first front gate. The signal processing unit also includes a second transistor operatively coupled to the first transistor. The second transistor includes a second back gate electrically coupled to a second front gate. The semiconductor device also includes a gain circuit for providing a gain upon the output signal. The semiconductor device also includes a bias circuit to provide a first bias signal to the first back gate and a second bias signal to the second back gate.
机译:公开的至少一种方法,装置和系统涉及提供具有包括后栅极和前栅极的晶体管的半导体器件。该半导体器件包括信号处理单元,用于处理输入信号以提供输出信号。信号处理单元包括第一晶体管和第二晶体管。第一晶体管包括电耦合到第一前栅极的第一后栅极。信号处理单元还包括可操作地耦合到第一晶体管的第二晶体管。第二晶体管包括电连接到第二前栅极的第二后栅极。该半导体器件还包括用于在输出信号上提供增益的增益电路。该半导体器件还包括偏置电路,以将第一偏置信号提供给第一背栅,并将第二偏置信号提供给第二背栅。

著录项

  • 公开/公告号US9923527B2

    专利类型

  • 公开/公告日2018-03-20

    原文格式PDF

  • 申请/专利权人 GLOBALFOUNDRIES INC.;

    申请/专利号US201615148668

  • 发明设计人 THOMAS G. MCKAY;

    申请日2016-05-06

  • 分类号H01L27/092;H03F3/193;H01L21/84;H03G1;H03F1/02;H01L21/762;H01L29/66;H01L29/78;H01L23/66;H01L27/12;H01L21/67;G06F17/50;H01L21/8238;

  • 国家 US

  • 入库时间 2022-08-21 12:57:24

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