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Metal oxide thin film transistor with source and drain regions doped at room temperature

机译:在室温下掺杂源极和漏极的金属氧化物薄膜晶体管

摘要

Thin film transistors are provided that include a metal oxide active layer with source and drain regions having a reduced resistivity relative to the metal oxide based on doping of the source and drain regions at room temperature. In an aspect, a transistor structure is provided, that includes a substrate, and source and drain regions within a doped active layer having resulted from doping of an active layer comprising metal-oxide and formed on the substrate, wherein the doped active layer was doped at room temperature and without thermal annealing, thereby resulting in a reduction of a resistivity of the source and drain regions of the doped active layer relative to the active layer prior to the doping. In an aspect, the source and drain regions have a resistivity of about 10.0 mΩ·cm after being doped with stable ions and without subsequent activation of the ions via annealing.
机译:提供了薄膜晶体管,其包括金属氧化物有源层,该有源层具有基于室温下的源极和漏极区域的掺杂而相对于金属氧化物具有降低的电阻率的源极和漏极区域。在一个方面,提供了一种晶体管结构,该晶体管结构包括衬底以及在掺杂的有源层内的源极和漏极区,该有源层是通过掺杂包括金属氧化物的有源层而形成的并且形成在衬底上,其中该掺杂的有源层是掺杂的。在室温下且没有热退火的情况下,从而导致掺杂的有源层的源区和漏区相对于掺杂之前的有源层的电阻率降低。在一个方面,在用稳定离子掺杂并且没有随后通过退火激活离子之后,源极和漏极区域具有约10.0mΩ·cm的电阻率。

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