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Method for designing and manufacturing an integrated circuit, system for carrying out the method, and system for verifying an integrated circuit

机译:用于设计和制造集成电路的方法,用于执行该方法的系统以及用于验证集成电路的系统

摘要

A method of manufacturing an integrated circuit, a system for carrying out the method, and a system for verifying an integrated circuit may use a standard cell layout including a first layout region that may violate design rules. The method for designing an integrated circuit may comprise receiving a data file that includes a scaling enhanced circuit layout, and designing a first standard cell layout using design rules and the data file. The designing the first standard cell layout may include designing a first layout region of the first standard cell layout using the data file, and designing a second region of the first standard cell layout using the design rules.
机译:制造集成电路的方法,用于执行该方法的系统以及用于验证集成电路的系统可以使用包括可能违反设计规则的第一布局区域的标准单元布局。用于设计集成电路的方法可以包括:接收包括缩放增强电路布局的数据文件;以及使用设计规则和数据文件来设计第一标准单元布局。设计第一标准单元布局可以包括:使用数据文件设计第一标准单元布局的第一布局区域;以及使用设计规则设计第一标准单元布局的第二区域。

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