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Selective atomic layer deposition process utilizing patterned self assembled monolayers for 3D structure semiconductor applications
Selective atomic layer deposition process utilizing patterned self assembled monolayers for 3D structure semiconductor applications
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机译:利用有图案的自组装单层膜进行3D结构半导体应用的选择性原子层沉积工艺
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摘要
Methods for forming fin structure with desired materials formed on different locations of the fin structure using a selective deposition process for three dimensional (3D) stacking of fin field effect transistor (FinFET) for semiconductor chips are provided. In one embodiment, a method of forming a structure with desired materials on a substrate includes forming a patterned self-assembled monolayer on a circumference of a structure formed on a substrate, wherein the patterned self-assembled monolayer includes a treated layer formed among a self-assembled monolayer, and performing an atomic layer deposition process to form a material layer predominantly on the self-assembled monolayer from the patterned self-assembled monolayer.
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