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Clock data recovery circuit, integrated circuit including the same, and clock data recovery method

机译:时钟数据恢复电路,包括该时钟数据恢复电路的集成电路以及时钟数据恢复方法

摘要

A clock data recovery circuit may include: a phase comparison unit suitable for comparing input data with a phase of a multi-phase clock, and for generating an up/down signal corresponding to the comparison resu a filtering unit suitable for counting the up/down signal based on an upper threshold value and a lower threshold value, for setting, when an overflow occurs, the lower threshold value to an initial value for the count of the up/down signal, or when a underflow occurs, the upper threshold value to the initial value for the count of the up/down signal, and for generating a control code corresponding to one of the underflow and the overflow; and a phase rotating unit suitable for adjusting the phase of the multi-phase clock in response to the control code outputted from the filtering unit.
机译:时钟数据恢复电路可以包括:相位比较单元,其适于将输入数据与多相时钟的相位进行比较,并且用于生成与比较结果相对应的上/下信号;以及滤波单元,其适于基于上阈值和下阈值对上/下信号进行计数,用于在发生溢出时将下阈值设置为用于上/下信号计数的初始值,或者当发生下溢时,用于上/下信号的计数的上阈值至初始值,并且用于生成与下溢和上溢之一相对应的控制代码;相位旋转单元,其适于响应于从滤波单元输出的控制码来调整多相时钟的相位。

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