COMPUTER ARCHITECTURE USING RAPIDLY RECONFIGURABLE CIRCUITS AND HIGH BANDWIDTH MEMORY INTERFACES

摘要

A programmable device comprises one or more programming regions each comprising a plurality of configurable logic blocks where each of the plurality of configurable logic blocks is selectively connectable to any other configurable logic block via a programmable interconnect fabric. The programmable device further comprises configuration logic configured to in response to an instruction in an instruction stream reconfigure hardware in one or more of the configurable logic blocks in a programming region independently from any of the other programming regions.