首页>
外国专利>
SYNTHESIS PATH FOR TRANSFORMING CONCURRENT PROGRAMS INTO HARDWARE DEPLOYABLE ON FPGA-BASED CLOUD INFRASTRUCTURES
SYNTHESIS PATH FOR TRANSFORMING CONCURRENT PROGRAMS INTO HARDWARE DEPLOYABLE ON FPGA-BASED CLOUD INFRASTRUCTURES
展开▼
机译:在基于FPGA的云基础架构上将并行程序转换为可部署的硬件的综合路径
展开▼
页面导航
摘要
著录项
相似文献
摘要
Exploiting FPGAs for acceleration may be performed by transforming concurrent programs. One example mode of operation may provide one or more of creating synchronous hardware accelerators from concurrent asynchronous programs at software level, by obtaining input as software instructions describing concurrent behavior via a model of communicating sequential processes (CSP) of message exchange between concurrent processes performed via channels, mapping, on a computing device, each of the concurrent processes to synchronous dataflow primitives, comprising at least one of join, fork, merge, steer, variable, and arbiter, producing a clocked digital logic description for upload to one or more field programmable gate array (FPGA) devices, performing primitive remapping of the output design for throughput, clock rate and resource usage via retiming, and creating an annotated graph of the input software description for debugging of concurrent code for the field FPGA devices.
展开▼