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Method of manufacturing multi-gate single-electron device system operating in room-temperature

机译:在室温下运行的多栅极单电子器件系统的制造方法

摘要

A method of fabricating a multi-gate single electron device system operating at room temperature is disclosed. (A) forming a top silicon layer structure on a silicon-on-insulator (SOI) wafer using lithography and etching, the top silicon layer structure comprising a source, a channel, a drain and one or more side gates; (b) forming an ion implantation mask over the channel and implanting Group III or V fluoride; (c) forming an etch mask on the surface of the wafer except for the channel top, channel top and side gate portions using lithography, and etching the top silicon layer of the portion where the etch mask is not formed to a predetermined thickness; (d) etching so that the upper silicon layer of a predetermined thickness remains, and then removing the etching mask; (e) growing a silicon oxide film through a thermal oxidation process; (f) forming a polysilicon layer or a metal thin film on the surface of the wafer, forming a mask so as to cover an upper portion of the channel and a part of the source or drain using lithography, and etching the upper layer gate .
机译:公开了一种制造在室温下运行的多栅极单电子器件系统的方法。 (A)使用光刻和蚀刻在绝缘体上硅(SOI)晶片上形成顶部硅层结构,该顶部硅层结构包括源极,沟道,漏极和一个或多个侧栅; (b)在通道上形成离子注入掩模,并注入III族或V族氟化物; (c)使用光刻在晶片的除沟道顶部,沟道顶部和侧栅极部分之外的表面上形成蚀刻掩模,并且将未形成蚀刻掩模的部分的顶部硅层蚀刻至预定厚度; (d)蚀刻,以保留预定厚度的上硅层,然后去除蚀刻掩模; (e)通过热氧化工艺生长氧化硅膜; (f)在晶片的表面上形成多晶硅层或金属薄膜,使用光刻法形成掩模以覆盖沟道的上部以及部分源极或漏极,并蚀刻上层栅极。

著录项

  • 公开/公告号KR101808622B1

    专利类型

  • 公开/公告日2017-12-14

    原文格式PDF

  • 申请/专利权人 충북대학교 산학협력단;

    申请/专利号KR20110074326

  • 发明设计人 최중범;이종진;이조원;

    申请日2011-07-26

  • 分类号H01L21/335;H01L29/775;

  • 国家 KR

  • 入库时间 2022-08-21 12:41:24

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