3 3D SRAM CORE CELL HAVING VERTICAL STACKING STRUCTURE AND CORE CELL ASSEMBLY COMPRING THE SAME

摘要

Provided is a 3D SRAM core cell including six thin film transistors each having a gate electrode, a source electrode, and a drain electrode. The SRAM core cell includes two switching thin film transistors connected to a bit line and a word line, respectively, for selecting writing and reading of data; and four data storage thin film transistors connected to a power supply voltage (Vdd) or a ground voltage (Vss) to write and read data. In addition, the SRAM core cell includes a first transistor layer including two selected from the six thin film transistors; a second transistor layer located on the first transistor layer and including two selected from the remaining four thin film transistors; and a third transistor layer located on the second transistor layer and including the remaining two thin film transistors, wherein at least one kind of electrode of the first transistor layer and at least one kind of electrode of the second transistor layer are electrically connected, and at least one kind of electrode of the second transistor layer and at least one kind of electrode of the third transistor layer are electrically connected. Thus, according to the 3D SRAM core cell of the vertical layer structure of the present invention, the same type of organic transistors are vertically stacked on the same plane, thereby omitting a complicated patterning process for forming different types of organic transistors when a memory device is manufactured, and the area occupied by the memory element may be reduced so that the integration of the semiconductor circuit is improved.