GENERATING A WAFER INSPECTION PROCESS USING BIT FAILURES AND VIRTUAL INSPECTION

摘要

Methods and systems for generating a wafer inspection process are provided. One method includes storing the output of the detector (s) of the inspection system at the time of scanning of the wafer, regardless of whether the output corresponds to defects detected on the wafer, and detecting Separating physical locations on the wafer corresponding to bit defects into a first portion of the physical locations where the defects were not detected and a second portion of the physical locations where the defects were detected. The method may also include applying one or more defect detection method (s) to the stored output corresponding to the first portion of the physical locations to detect defects in the first portion of the physical locations, and And generating a wafer inspection process based on the defects detected by the one or more defect detection method (s) in the first portion of the physical locations.